• The effective gate capacity reaches 13.6 million gates;

• Core voltage 1.1V, I/O standard voltage 3.3V, supporting multiple I/O standards;

• Equipped with 1200 4.5K BRAM, capable of achieving a maximum of 5.4Mbit RAM;

• Equipped with 192 high-speed 18bit  18bit multipliers;

• Equipped with 8 programmable PLLs, with a maximum clock management frequency of up to 500MHz;

• Up to 16 global clock drivers can be provided;

• Can provide 498 programmable user I/Os and 249 pairs of LVDS differential ports;

• Supports on-chip digital control termination resistor (DCT);

• Supports active serial, passive serial, active parallel, passive parallel, JTAG, SPI configuration modes;

• ESD withstand voltage greater than 2000V;

• Package: CS484/FG676 (plastic package).